A Single Channel IGBT Gate Drivers for Medium Voltage Converters

This article treats the gate driver system for IGBT modules in Medium-Voltage (MV) applications. The study focuses principally on two functions of an IGBT gate driver: an impulse signal transmission and a power transmission. For each function, the suitable topology is proposed. Then, for safety and device's protection reason, all gate driver functions must sustain the high and very high galvanic insulation voltage capabilities. For low-cost design, the insulation system can be achieved with the help of the insulating material in a pot core planar transformer. Therefore, for each function, the optimized design of a pot-core transformer and its associated electronics components is performed with the help of a virtual prototyping tool (a genetic algorithm: GA code in MATLAB TM ). The first section focuses on optimization design of a selected topology for an impulse signal transmission function. A bi-objective (maximize the output voltage vout and minimize the input current imos) problem of this function that leads to a Pareto front is presented. Several Pareto fronts’ results are obtained assuming different insulation layers thickness. The second part focuses on optimization design of a selected topology for a power transmission function. Maximize the converter efficiency (ηcon) and minimize the output power (Pout) are considered as a bi-objective. Thus, numerous Pareto fronts’ results are achieved for a few different insulation thicknesses. Finally, the prototype of a single channel IGBT gate driver is invented to validate the proposed design.

For safety and protection purposes, IGBT gate drivers for IGBT modules in the MV-MMC converter must support the insulation voltage which equals input DC voltage V in,DC (can reach few of 10kV as mentioned in Figure 1b and [4]). Figure  1c illustrates the main four functions of the IGBT gate driver system [5][6][7][8]. In this research paper, the authors address the optimization design of the impulse signal transmission function and the power supply function. The insulation technology is done through the air-gap of the pot core planar transformer (cf. Figure 1d) [22]. With the air gap thickness of 0.5mm with a dielectric polyetherimide, the few of 10kV of insulation voltage level is achieved [14,15].
The optimization methodology for these functions: geometric of transformer is performed with finite element (FEMM TM ) software and transient simulation is done by the simulator (LTSpice TM ). Hence, the optimization results under Pareto fronts are obtained by the help of a genetic algorithm (GA) coded in MATLAB TM script which can run FEMM TM and LTSpice TM software.
The structure of this paper is divided into three sections: Section 2 presents the optimization for these two functions. Section 3 and Section 4 illustrate the validation results and the conclusions/perspectives, respectively.

Impulse Signal Transmission Function
Figure 2a presents a proposed circuit for an impulse signal transmission function. According to this figure, a series resonant (C 1 , L p , R p , N-MOSFET) and a parallel resonant (L s , R s , C 2 ) are proposed to form an impulse transmission circuit that is generated by N-MOSFET. Moreover, for discharging the energy in C 1 , R 1 = 10kΩ is required and is located in parallel to this capacitor. The transformer air gap thickness (ep 1 ) and its polyetherimide dielectric are used to determine the galvanic insulation voltage level. According to Am et al. [7], ep 1 = {0.5mm -3mm} can achieved the insulation voltage level more than 10kV.
Maximize the output voltage (v out ) and minimize the input current (i mos ) are set as a bi-objective optimization problem. This current must be minimized for reducing the power consumption in the system. To achieve these bi-objectives, the optimization variables are: C 1 , C 2 , R out (electrical) and n 1 , x 1 , n layer (geometrical of the transformer). Then, with the help of the effective virtual prototyping tool (genetic algorithm: GA code) [19][20], the optimization results under the Pareto front forms are obtained.
Optimization variables for an impulse signal transmission function: The optimization variables are abstracted in vector X: X PWM = (n 1 , x 1 , n layer , C 1 , C 2 , R out ) t . As presented in Figure  1d, x 2 is an internal geometrical variable and is expressed in equation (1) as a function of other geometrical variables and parameters. The geometrical parameters are constants and are summarized in Table 1.
Optimization flowchart and constraints for an impulse signal transmission function: Figure 2b details the optimization procedure for this proposed design. As presented previously, v out (to be maximized) and i mos (to be minimized) are determined as a bi-objective function. And this optimization design process must satisfy the optimization constraints listed in Table 1.

Power Supply Function
As shown in Figure 3a, a DC-DC isolated power supply is required for supplying the necessary power to electronics and logic components at the secondary side of the gate driver system. For ensuring the operation, the insulation of power supply function and signal transmission function must be at the same level. According to Am et al. [7][8], a full-bridge series-series resonant converter is highly recommended in terms of high efficiency (ZVS operation) and high insulation achievements. Figure 3b shows the equivalent circuit of a selected DC-DC power supply topology. This converter constructs with: 4 MOSFETs for an active inverter stage from DC input power to AC output (resonant tank), series resonant tanks (C pr and C se in series with a primary and a secondary winding), four diodes for an uncontrolled rectifier stage. Finally, the filter capacitor C f has placed to smooth-out the final DC output voltage (V out ). Moreover, the voltage ratio (G v =V out /V in ) of this DC-DC converter is illustrated in Figure 3c. According to these G v curves with different load levels, the output voltage can be independent of the magnetic coupling of the transformer and the load when G v =1. According to the demonstration in the article [7][8] and resonant tanks parameters in Table 2, the voltage transfer ratio is derived as presented in equation (4). Based on this equation and Figure 3c, the G v can be operated independently of the magnetic coupling (k) and the load (R L ) at frequency f V,H =fres/ (1 − k) where the zero voltage switching (ZVS) condition is achieved [16 -18].
The output P out and the converter efficiency η con of this converter are presented in detail by Dijiruc et al. [14]. Thus, maximize the converter efficiency η con and minimize the output power are set as a bi-objective optimization problem.
Optimization variables for a power supply function: the same as a PWM signal transmission function, the variables compose of the electrical variables (C pr , C se , f p , R out ) and geometrical variables (cf. Figure 1d: n 1 , x 1 , n layer , ep 2 , ep 6 ). Thus, the vector optimization variables X is X power = (n 1 , x 1 , n layer , ep 2 , ep 6 , C pr , C se , f p , R out ) t . Moreover, the optimization parameters are mostly the same as a PWM signal design except for the pot core diameter D F . For a power supply design, these diameter D F are 14mm, 18mm, and 22mm.   Optimization flowchart and constraints for a power supply function: Figure 3d details about the optimization procedure by taking into account all the variables and parameters. But in order to achieve the bi-objective optimization with the feasibility of the physical design, numerous technical constraints must be respected (referred to Table 3).

Simulation Results
A signal transmission function: the optimization results under the Pareto fronts, for D F = {7mm, 9mm, and 14mm} and ep 1 = {05mm to 3mm}, are shown in Figure 4a. As previously mentioned, an ep 1 = 0.5mm associated with a polyetherimide material is recommended for the 40kV MV-MMC application. Thus, with this insulation level, one Pareto front from D F = 7mm and one Pareto front from D F = 9mm are considered for the design target as presented in Figure 4b. Amongst these possible solutions, the solution d 2 is selected because of its low power consumption and acceptable voltage information. Table 4 summarized all the numerical values of this solution. Figure 4c and Figure 4d illustrates the output voltage v out and a primary side current i mos . According to the rate of this current, the proposed PWM signal transmission technology consumes much energy less than the result in the article [5].
A power transmission function: The Pareto fronts ( V con versus P out ) for ferrite diameter D F = {14mm, 18mm, 22mm} and ep 1 ={0.5mm -3mm} are shown in Figure 5a-c. According to these results, the solution from D F =14mm is dominant in terms of the highest efficiency. For the same insulation as an impulse signal transfer, the solution from ep 1 =0.5mm is considered. So, the solution (a) is selected for prototype work because of its output power of 2W is achieved (cf. Figure 4d). This solution (a) is summarized in Table 4.  : (a) 22mm, (b) 18mm, (c) 14mm, and (d) the optimization design target for prototype.  Figure 6a shows the prototype of a single channel IGBT gate driver. The power supply locates at the lower side. The main components for this function are 2 full-bridge MOSFETs (IRL6372PbF) are controlled by LM5046 controller, 4 diodes (MBRA340T3), a pot core transformer (D F =14mm), and 2 capacitors. The upper side of Figure 6a illustrates the prototype of a PWM signal transfer. The main components for this function are N-MOSFET (ZXMN3A01F) is controlled by 74LS32, 2 capacitors, a pot core transformer (D F = 9mm) and output resistor. Figure 6b presents the sample of the prototype of an optimal transformer. Then, the experimental test-bench is resumed in Figure 6c.

Comparison Results
Validation results for a power supply function: According to the voltage transfer ratio G v (cf. Figure 7a), in order to achieve ZVS condition and obtain V out ≤ 20V, the operating frequency must stay between 200kHz and 350kHz. The comparison results for the selected solution (a) are illustrated in Figure 7b. The small error between these two cases surely comes from little error values of each component. Figure 7c shows the comparison results for frequency varies from 200kHz to 350kHz. Then, another comparison result for load varies (R L = [39Ω to 82Ω]) are shown in Figure 7d. Based on these, the output voltage from 12.5V to 13V and output power from 2W to 4W are achieved. Then, the efficiency higher than 74% is recorded.  Validation results for a PWM signal transmission function: As discussed in the previous section, the optimal solution (d 2 : D F = 9mm and ep 1 = 0.5mm) of a PWM signal transmission function is selected for practical works. Figure 8b illustrates the experimental results of the voltages V out (output voltage), V ds (drain-source voltage of N-MOSFET) and V ge (gate-emitter voltage of IGBT). According to these experimental results, the propagation delay is around 70ns the same as mentioned in an article Am et al. [5] but consumes less power compared to that article. The output voltage information V out of a proposed circuit is the vital variable for experimental validation for comparing to the simulation result. As shown on the left side in Figure 8c, V out,max is 5.7V for the practical work result which is about 0.1V lower than the simulation result. The difference surely comes from the parasitic elements (passive components) and circuit layout.
Furthermore, on the right side of Figure 8c, the comparison waveforms of i mos are also provided where the peak is about 1.5A (for experimental result) and 1.55A (for the simulation one). Then, the gate-emitter voltage V ge (t) = +/-15V of the IGBT module is achieved as illustrated in Figure 8d for a few electrical periods.

Conclusion
This research article presents a high insulation voltage single-channel IGBT gate driver: a power supply function and a PWM signal transmission function. Two proposed topologies are described for the application where the insulation voltage of 40kV is required. This voltage level can be achieved by using 0.5mm air-gap with polyetherimide material of pot core transformers.
For the PWM signal transmission function, several optimal Pareto fronts are obtained. Amongst these solutions, the solution d 2 (ep 1 = 0.5mm/ D F = 9mm) is selected for experimental works. For the power supply function, a fullbridge resonant topology is chosen. Then, numerous optimization results under Pareto front forms are obtained for different insulation voltage levels. Optimal solution a (ep 1 = 0.5mm/ D F = 14mm) is selected for practical works. For the experimental works, two optimal transformers and experimental boards are set up. Then, the experimental waveforms are measured to compare with the simulation ones. The comparison trends for important variables are shown with a small difference that comes from the parasitic elements and circuit layout.
For the next study, the authors focus on a very high insulated power transmission of gate drivers in a series connection of multiple power devices. The series connection of multiple devices is shown in Figure 9. We will investigate on a power transformer, EMI reducing architecture, minimization of the parasitic capacitor, etc.